Computer Component

64 questions · Fundamental Engineering · 51–64

Apr 2019 · Question 9

For a processor running at 50 MIPS, what is the average execution time per instruction?

a)20 nsb)50 nsc)2 µsd)5 µs

Apr 2019 · Question 10

Which of the following is an appropriate characteristic of SRAM compared to DRAM? Here, SRAM and DRAM are compared in products manufactured in the same or similar semiconductor geometric process.

a)SRAM consumes more power, particularly when idle, compared to DRAM.b)SRAM is non-volatile, whereas DRAM is volatile.c)SRAM needs to be refreshed, whereas DRAM does not.d)SRAM uses more transistors in a memory cell compared to DRAM.

Apr 2019 · Question 11

In a memory system that has a cache memory, which of the following causes an increase in the average memory access time?

a)A decrease in the access time to the cache memoryb)A decrease in the cache hit ratec)A decrease in the cache miss penaltyd)A decrease in the cache miss rate

Apr 2019 · Question 12

There exists a storage system in which one (1) block is composed of eight (8) sectors of 500 bytes each, and the storage area is block-wise allocated to the files. When a 2,000-byte file and 9,000-byte file are to be saved, what is the total number of sectors that is allocated to these two (2) files? Here, the sectors that are occupied by the directory information and other such management information can be ignored.

a)22b)26c)28d)32

Apr 2019 · Question 22

Which of the following is an appropriate example of utilizing an RFID?

a)Close range transmission of data using infrared raysb)Identification and management of personnel or items by using a very small wireless chipc)Input of information by using a reader to read a digital code that is printed on a paperd)Transmission of audio data between a cellphone and headphones

Oct 2018 · Question 10

Which of the following is a special purpose register that stores the result of a comparison or the sign of the result of an arithmetic operation?

a)Accumulatorb)Flags registerc)Instruction registerd)Program counter

Oct 2018 · Question 11

Which of the following is the addressing mode that references data in main memory as shown in the figure below?

a)Direct addressingb)Indexed addressingc)Indirect addressingd)Relative addressing

Oct 2018 · Question 12

When a 1-megabyte memory is connected to the MPU as shown in the figure below, what is the minimum number of signal lines (represented as _n) required by address buses? Here, the memory is accessed in units of bytes. In addition, 1 megabyte = 1,024 kilobytes and 1 kilobyte = 1,024 bytes.

a)18b)19c)20d)21

Oct 2018 · Question 13

Which of the following is an appropriate explanation of USB 3.0?

a)It uses a serial interface that has a 5 Gbps data transfer mode called super speed.b)It uses a serial interface that has both an isochronous transfer mode suitable for voice, video, and other data, and a broadcast transfer mode.c)It uses an interface that transmits 2 bits of information in one (1) clock cycle with four (4) pairs of signal lines, and has a maximum throughput of 1 Gbps.d)It uses the serial version of ATA interface that is standardized for the connection of a PC to peripheral devices.

Oct 2018 · Question 14

Which of the following is an appropriate description of the effect of cache memory?

a)By reading data from main memory and storing it in cache memory, and then processing instructions in parallel in cache memory, operations are performed at high speed.b)By reading data from main memory and storing it in cache memory, data transfer is performed at high speed when the CPU reads the same data later.c)By reading instructions and data simultaneously from main memory to cache memory, data transfer is performed at high speed.d)By reading instructions from main memory and storing them in cache memory, and then decoding and executing them in cache memory, operations are performed at high speed.

Apr 2018 · Question 9

Which of the following addressing modes determines the effective address by adding the value of the instruction address register (program counter) to the value recorded in the address part of the instruction?

a)Absolute addressingb)Base addressingc)Indexed addressingd)Relative addressing

Apr 2018 · Question 10

A computer has two levels of memories, cache memory and main memory, with an access time of 0.01 µs and 0.1 µs respectively. If the hit ratio of the cache memory is 90%, which of the following is the appropriate average memory access time for this system? In this scenario, if the data is in the cache memory, the processor accesses the data directly with an access time of 0.01 µs. However, if a cache miss occurs, the data is required to be transferred from the main memory to the cache memory first, and then subsequently accessed from the cache memory. Thus, the access time becomes 0.11 µs.

a)0.011 µsb)0.019 µsc)0.020 µsd)0.091 µs

Apr 2018 · Question 11

Which of the following is an output device for the computer?

a)Camerab)Mousec)Printerd)Scanner

Apr 2018 · Question 12

What is the average rotational latency of a hard disk drive in milliseconds when its rotation speed is 2000 rotations per minute?

a)10b)15c)25d)30