IPA FE Subject A sample Question 11
A question IPA Japan published in 基本情報技術者試験 科目A サンプル問題 問11, translated into English. ITPEC is based on the same exams.
ECC is used for error detection and correction in memory. When n+2 redundant bits are required for a data bus having a width of 2n bits, what is the number of redundant bits that are required for a data bus having a width of 128 bits?
Explanation
9 bits — write the bus width as a power of two and apply the rule n + 2.
- •128 = 27, so n = 7
- •Redundant bits: 7 + 2 = 9
This agrees with the familiar case of a 64-bit bus, 26, which needs 6 + 2 = 8 check bits, the 72-bit ECC memory word.
Answer (c)
Why not others:
- •(a) 7 — stops at the exponent n = 7 and forgets to add the 2
- •(b) 8 — takes the exponent as 6, but 26 = 64: that is the answer for a 64-bit bus
- •(d) 10 — takes the exponent as 8, but 28 = 256
Key rule: When a formula is given in terms of 2n, first find n exactly (27 = 128, 210 = 1,024), then apply the whole formula; ECC check bits grow only by one each time the data width doubles.
Computer Component · AI-written, may contain errors
This question comes from the past questions IPA Japan publishes, translated into English by ITPEC Practice. ITPEC Practice is an independent study tool and is not affiliated with IPA or ITPEC. See the original paper (PDF) or Report an issue.