ITPEC IP October 2018 Question 11

Source exam: ITPEC IP October 2018Topic: Computer Component

ITPEC IP October 2018 — Question 11 of 100

Cache memory reduces the effective time the CPU spends accessing main memory. It is a small, high-speed memory close to the processor that holds recently or frequently used instructions and data. Cache hits can therefore be served much faster than accesses to main memory.

Answer (c)

Why not others:
- an SSD is secondary storage, not an intermediary for routine CPU-to-RAM access

- virtual memory extends the address space using storage and is slower than RAM

- defragmentation reorganizes files on storage media

Key rule: A cache exploits temporal and spatial locality to bridge the speed gap between the CPU and main memory.

AI-generated — may contain errors

The original exam layout is preserved in the image so diagrams, formulas, tables, and code remain accurate.

This question comes from an official ITPEC past paper. ITPEC Practice is an independent study tool and is not affiliated with ITPEC. See the official IP past-paper collection or Report an issue.