ITPEC FE Morning April 2021 Question 22
ITPEC FE Morning April 2021 — Question 22 of 80
Logic gate implementation of F = A·B + C·D — identify which circuit does NOT match the formula.
The target function is F = A·B + C·D (two ANDs feeding an OR).
Circuit analysis:
- (a) AND + AND → OR = A·B + C·D ✓ (direct implementation)
- (b) NAND + NAND → NAND = NOT(NOT(A·B) · NOT(C·D)) = A·B + C·D ✓ (De Morgan's)
- (c) NOR + NOR → NOR = NOT(NOT(A+B) + NOT(C+D)) = (A+B)·(C+D) ✗ (different function)
- (d) NAND + NAND → AND → NOT = NOT(NOT(A·B) · NOT(C·D)) = A·B + C·D ✓ (De Morgan's)
Answer: (c) — three NOR gates produce (A+B)·(C+D), not A·B + C·D.
Key rule: NAND is a universal gate — three NANDs can implement AND-OR logic via De Morgan's law. NOR gates in the same topology produce a fundamentally different Boolean function.
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