ITPEC FE Morning April 2020 Question 9
ITPEC FE Morning April 2020 — Question 9 of 80
RISC vs CISC — RISC uses uniform instruction length for efficient pipelining.
RISC characteristics:
- Fixed (uniform) instruction length
- Simple instructions, each executes in one clock cycle
- Optimized for pipelining
- More instructions needed per task, but each is fast
- Hardware-based execution (no microcode)
CISC characteristics:
- Variable instruction length
- Complex instructions (one instruction can do multi-step operations)
- Uses microcode to decode complex instructions
- Fewer instructions per task, but each takes multiple cycles
Why not others:
- (a) Micro-code architecture — this is a CISC feature, not RISC
- (c) Variable instruction length — CISC uses variable length; RISC uses fixed/uniform
- (d) Complex instructions with few instructions — this literally describes CISC
Key rule: RISC = Reduced, uniform, pipeline-friendly. CISC = Complex, variable, microcode-driven.
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