ITPEC FE Morning April 2020 Question 9
Which of the following is a characteristic of a RISC processor when it is compared with a CISC processor?
Explanation
Uniform instruction length for pipelining — RISC keeps instructions simple and the same length so each pipeline stage handles them in step.
A RISC processor has a small set of simple instructions of fixed length, most of which finish in one cycle, and it decodes them with wired logic. Because every instruction is the same length, the next one can be fetched and decoded before the current one finishes, which keeps the pipeline full. A CISC processor has many complex instructions of variable length, typically interpreted by microprograms.
Answer (b)
Why not others:
- •(a) — microcode is how CISC executes its complex instructions; RISC uses hard-wired control
- •(c) — variable instruction length is a CISC trait, and it hampers pipelining because the decoder must first find where each instruction ends
- •(d) — complex instructions that do a task in few steps is the definition of CISC
Key rule: RISC trades more, simpler instructions for wired logic and smooth pipelining; CISC trades fewer, complex instructions for microcode and variable length.
Computer Component · AI-written, may contain errors
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