ITPEC FE Morning October 2023 Question 21
ITPEC FE Morning October 2023 — Question 21 of 80
Logic Circuit Simplification — simplify a NAND + NOR circuit using De Morgan's law.
Original circuit: B and C → NAND, then A and NAND output → NOR
Step-by-step:
- NAND output: ¬(B · C)
- NOR output: ¬(A + ¬(B · C))
- Apply De Morgan's: ¬A · (B · C) = ¬A · B · C
Result: (NOT A) AND B AND C
Answer: (c) — NOT gate on A, then AND gate on ¬A, B, C.
Why not others:
- (a) — uses OR gate, produces different logic
- (b) — NAND + NOR combination with wrong input grouping
- (d) — has NOT on A but final gate is NAND (inverted output)
Key rule: NAND = ¬(A·B), NOR = ¬(A+B). De Morgan's: ¬(X+Y) = ¬X · ¬Y.
AI-generated — may contain errors
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